The speed memory Flash Memory flashes Widely apply to fields such as office equipment, communication equipment, medical apparatus, household appliances,etc. with a great deal of advantages that its high, manufacturing cost of integrated level is low, easy to use,etc.. Utilize non-volatile can upgrade the intersection of data and the intersection of parameter and characteristic onlining information its, can serve as read-only memory with certain flexibility their.
In the application system of the one-chip computer, often meets the high-capacity data and stores the question. The speed memory large because of the capacity and storing a great deal of advantages of fast, small, consumption low grade flashes, and become the choosing first of memory of the data in the application system. However, because the resources of the one-chip computer are limited, and flash kind and working way of the speed memory are various, in therefore and the interface circuit of the speed memory flashes and design program in the one-chip computer, a lot of key technology problems need solving.
One-chip computer and to flash the intersection of speed and memory interface question that circuit should notice as follows,
1The working voltage of a lot of one-chip computers is 5V, but the memory of speed of a lot of sudden strain of a muscle works among 1.8-6V, memory of speed that some flash Flash Memory Erase on voltage and work is here for 12V.
2One-chip computer of 8 numerous, flash speed a lot of memory, belong to 16.
3The memory of speed of sudden strain of a muscle of the same type because producers are different, the definition of the pin is different, for example the intersection of Intel and 28F008BV and the intersection of AMD and 29LV008 of Company of Company have a lot of pin different.
One-chip computer and it flashes speed to be as follows, in question that design program of memory should notice
1Different operational order collections of use of memory usage of speed of sudden strain of a muscle of different producers, the software wants the operational order collection on the basis of the different uses of memory usage of speed of sudden strain of a muscle of producers.
2It is different to store structure and time parameter within the memory of speed of a lot of sudden strain of a muscle. Because flash and is divided within the speed memory into different size and stored one, when the speed memory to flashing is erased, the software should adjusted and erased and store parameters such as the size of one,etc. according to the memory of speed of sudden strain of a muscle of different types. Meanwhile, because the memory time parameters of speed of sudden strain of a muscle of different types are different, software want the intersection of speed and the intersection of time and parameter of memory come, adjust, read and write and erase the time operated according to flash.
To the question that met above, we consider the one-chip computer and the key technology problem that should solve in the memory application system of the speed flashes from hardware and software two respects.
An one-chip computer and the key technology of the memory hardware interface of speed flashes
The semi-conductive company which produces and flashes the speed memory mainly has Intel, AMD Company and Japanese Sharp, Fujitsu Company of U.S.A., these four market shares of the memory of speed of sudden strain of a muscle which companies produce are quite large. Table 1 has listed the index of performance of the memories of speed of sudden strain of a muscle of four main types which companies produces.
Can be found out from Table 1, it is different that working voltage and programming of the memories of speed of sudden strain of a muscle of different producers erase the voltage, the length of the location of data is different too at the same time. Because China employs the most extensive one-chip computer to remain 8?s MCS-51 series one-chip computer at present, 16?s one-chip computer kinds are fewer, and the working voltage is in the low-voltage 2.7- 3.6V One-chip computer very few. Will you please design one to flash in the circuit of the memory interface of speed with great majority with common 8 ordinary one-chip computers on the market? The answer is definite. We have designed one and flashed in the interface circuit of the speed memory TE28F160B3 with 8 ordinary one-chip computers AT89C52, AT89C52 is 8 compatible with MCS-51 series one-chip computer one-chip computers that ATMEL Company produces, there is E2PROM procedure memory of one 16K within it, its working voltage is 5V. The capacity that TE28F160B3 is production of INTEL Company is 16M location, data bus flashing memory memory with width of 16, its working voltage is 2.7- 3.6V. Need to point out, though that TE28F160B3 is been as 2.7-3.6V, every voltage ranges workings largest of pin of it been working for voltage until ? 0.5V- 5.0V, every pin highest working voltage of high level can?t exceed 5.5V, make us design with the interface circuit of TE28F160B3 with AT89C52 in this way. Circuit of this interface.
Because AT89C52 is 8 one-chip computers, and TE28F160B3 is 16 data bus, we have finished the data conversion of 8 and 16 with two slices of 74HC244 and two slices of 74HC373. When AT89C52 writes the data to TE28F160B3, one-chip computer write high 8 data into get latch in the 74HC373-1 at first. Among them 74HC373-1 latches the signal W373 exported by the decoder GAL16V8, then the one-chip computer begins to carry out to write to TE28F160B3 the data are operated, it is low 8 data are written into TE28F160B3 directly by P0 mouth of AT89C52, and on locking 8 high DQ8- DQ15 buses that data are written into to TE28F160B3 through the bumper 74HC244-1 in 74HC373-1. When AT89C52 reads the data from TE28F160B3, the ones that read are high 8 data are latched on 74HC373-2 first, then read into in AT89C52 through the bumper 74HC244-2. The memory capacity of TE28F160B3 is 16M location, there are lines A0 A19 of 20 addresses, it just has line of 16 addresses and AT89C52 costs altogether. So utilize the address line A15, A14 and A13 of AT89C52 by the decipher as latching signal and chip selection signal of two slices of 74HC244, two slices of 74HC373 and TE28F160B3. In this way only there is A0 A12 left in the line of address, for this reason use a counter 74HC4040 as the line A13- A19 of address, thus solve seeking the location problem of AT89C52.
The power supply power Vcc of TE28F160B3 connects 5V direct current source like AT89C52. But the programming voltage and erasing the voltage Vpp of TE28F160B3 must connect 12V.
The one-chip computer of Fig. 1 has used common AT89C52 on the market, but we recommend using the one-chip computer AT89LV52 and address decoder ATF16LV8 of the wide voltage range job in the design, in this way, can use about 3V of power supply power.
In producing and flashing the semi-conductive company Intel, AMD, Sharp and Fujitsu of the speed memory, the pin of the memory of speed of sudden strain of a muscle of Intel and Sharp Company is the same, the pin of the flashing memory memory of AMD and Fujitsu Company is the same. So Intel and the intersection of AMD and the intersection of sudden strain of a muscle and the intersection of speed and memory of Company be can?t exchanged, exchange, must carry on switching through one the intersection of interface and board.
2 one-chip computers and the key technology that the speed memory designs program flashes
Semi-conductive companies of the speed memory are numerous because of producing flashing, it is that types are numerous, various even if it is a memory of speed of sudden strain of a muscle of the same company. For make it suitable for most the intersection of sudden strain of a muscle and the intersection of speed and memory as much as possible not to design program, need to pay attention to the following several pieces of key technology.
2.1 The device is discerned automatically
The device discerns the parameter and function that the device supports that recognise order collecting, structural parameter of internal array, electricity and time that the device use automatically. There are two kinds of methods that the device discerns automatically: If the speed memory flashes to support CFI function, can obtain various parameters of the device through CFI directly; If the speed memory flashes not to support CFI function, can write the device discerns the order, then read the manufacturers and device codes of the products from the device, read various parameters of the device from the device parameter table that is set up in the procedure according to manufacturer and device code. Flow diagram that the device discerned automatically.
After discerning the device correctly, can collect and carry on various operation to the device according to the order of the device. All operation of the speed memory was realized through the interface CUI of order user of the chip to flashing. Write into different control orders through CUI, transfer from a working state to another working state if the speed memory flashes. Its main working state is: Read and store the unit and operate, erase operating and programming operation.
2.2 Read and store the unit to operate
After flashing electricity on the speed memory chip, the chip is in reading and storing the unit state, also can be through writing into resetting the order to enter and read and store the unit state, it is the same to read the operation of storing the unit as SRAM.
2.3 Erase and operate
In flash speed before the the intersection of memory chip and the intersection of programming and operation correctly, must guarantee, store unit as empty. If empty, must speed memory chip erase to flash. Flash the intersection of speed and memory adopt the intersection of module and sectional the intersection of array and structure, make all store the module and can be erased independently. Address on as providing is at module address range been and to when not ordering user interface not to be lasted ordered while writing by module into, the corresponding module is erased. It must consider the following several parameter to guarantee to erase the correct completion that is operated: 1The internal structure of module subregion of the speed memory chip will flash. 2Erase the voltage Vpp. 3Whole slice erases time and each module sectionally and erases the time parameter. Three parameters are got in the device is discerned above.
2.4 Programming operation
It is the programming of automatic byte that the programming operation of the speed memory chip flashes, can already write into in proper order, can also appoint the address to be written into. Pay attention to voltage Vpp of programming and programming time parameter of the chip at the time of programming operation, these two parameters can be got in the device is discerned too.
The above, the key technology question that should be paid attention to in memory hardware interface circuit of speed and software programming design that we provide the one-chip computer and flash. Mainly consider the working voltage and programming voltage of the chip on the hardware, want the factor of considering the internal structure of the device, using order collecting and time parameter etc. on the software. The speed memory device is lower and lower towards the larger and larger, working voltage of the capacity, support the direction of the common interface standard to develop with flashing, make, flash speed programming design easy in the intersection of memory and the intersection of hardware and interface and software, will make, flash the intersection of speed and application of memory to be more extensive.
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